1. Field of the Invention
The present invention relates generally to printed wiring boards (PWBs) and, more particularly, to methods and apparatuses that enable coefficient of thermal expansion (CTE) matching and heat dissipation for integrated circuit (IC) components attached to PWBs.
2. Description of Related Art
Currently, microelectronic modules and module sub-assemblies typically require that the heat-generating integrated circuit (IC) components of the module be mounted on thermal vias in the printed wiring board (PWB) or on external module housings to effectively remove heat from the module and allow it to operate properly and effectively.
While this approach of separating the heat-generating ICs from the other components of the module is a valid solution, the two approaches of thermal vias and module housings both have serious drawbacks. The use of a module housing to mount heat-generating components increases the cost and manufacturing time for the module. There is the expense of machining the module housing, and also of all the additional wiring and work required to connect the heat-generating components to the other parts of the module.
The use of thermal vias, while eliminating the need for a module housing and reducing the amount of additional wiring and work required to connect all the module components, introduce serious reliability problems because of the coefficient of thermal expansion (CTE) mismatch that occurs when heat-generating components are mounted on a layer of Copper or other ductile metal for effective heat dissipation. Because of the mismatch in CTE between the component and the metal layer, the reliability and usable life of the module is reduced.
Current technology does not have a ready solution for the combined problems of CTE matching and heat dissipation. While several attempts have been made to include layers in a PWB that will allow the board to have a tailorable CTE that can be matched to the components mounted on it, such as altering the chemistry of the dielectric materials or using specially formulated pregs, they consider the issue of the CTE of the whole board, and do not address the potentially disparate needs of individual board components. To this end, the CTE matching technologies available for PWB manufacture today reside mainly in the substrate and bonding layers of a PWB and do not address the ability to mount components to a metallization layer. Also, none of these approaches have dealt with the issue of heat dissipation. Even in a PWB that is CTE matched to the heat-generating components, there is still a need for a heat sink and a method for drawing the heat away from the components and into the sink.
This is especially problematic for radio-frequency (RF) applications. High-frequency components such as microwave circuits not only generate a great deal of heat, but also need to be mounted on a metal surface so that they have an RF ground. None of the available CTE matching solutions are viable for RF components because all of the CTE-matching materials currently used in PWBs are meant for bonding or dielectric layers, and cannot be put in direct contact with the RF components without a significant loss of performance. Further, several of the known methods for accomplishing CTE matching in a PWB entail altering the chemistry of the dielectric materials themselves, leading to further potential degradations in frequency performance.